101#if defined(BOTAN_SIMD_USE_SSSE3)
102 const auto idx = _mm_set_epi8(8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7);
103 return SIMD_2x64(_mm_shuffle_epi8(m_simd, idx));
104#elif defined(BOTAN_SIMD_USE_SIMD128)
105 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8));
118#if defined(BOTAN_SIMD_USE_SSSE3)
119 const auto idx = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
120 return SIMD_2x64(_mm_shuffle_epi8(m_simd, idx));
121#elif defined(BOTAN_SIMD_USE_SIMD128)
122 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0));
183 requires(ROT > 0 && ROT < 64)
185#if defined(BOTAN_SIMD_USE_SSSE3)
186 if constexpr(ROT == 8) {
187 auto tab = _mm_setr_epi8(1, 2, 3, 4, 5, 6, 7, 0, 9, 10, 11, 12, 13, 14, 15, 8);
188 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
189 }
else if constexpr(ROT == 16) {
190 auto tab = _mm_setr_epi8(2, 3, 4, 5, 6, 7, 0, 1, 10, 11, 12, 13, 14, 15, 8, 9);
191 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
192 }
else if constexpr(ROT == 24) {
193 auto tab = _mm_setr_epi8(3, 4, 5, 6, 7, 0, 1, 2, 11, 12, 13, 14, 15, 8, 9, 10);
194 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
195 }
else if constexpr(ROT == 32) {
196 auto tab = _mm_setr_epi8(4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11);
197 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
199 return SIMD_2x64(_mm_or_si128(_mm_srli_epi64(m_simd,
static_cast<int>(ROT)),
200 _mm_slli_epi64(m_simd,
static_cast<int>(64 - ROT))));
202#elif defined(BOTAN_SIMD_USE_SIMD128)
203 if constexpr(ROT == 8) {
204 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 1, 2, 3, 4, 5, 6, 7, 0, 9, 10, 11, 12, 13, 14, 15, 8));
205 }
else if constexpr(ROT == 16) {
206 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 2, 3, 4, 5, 6, 7, 0, 1, 10, 11, 12, 13, 14, 15, 8, 9));
207 }
else if constexpr(ROT == 24) {
208 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 3, 4, 5, 6, 7, 0, 1, 2, 11, 12, 13, 14, 15, 8, 9, 10));
209 }
else if constexpr(ROT == 32) {
210 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11));
212 return SIMD_2x64(wasm_v128_or(wasm_u64x2_shr(m_simd, ROT), wasm_i64x2_shl(m_simd, 64 - ROT)));