93#if defined(BOTAN_SIMD_USE_SSSE3)
94 const auto idx = _mm_set_epi8(8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7);
95 return SIMD_2x64(_mm_shuffle_epi8(m_simd, idx));
96#elif defined(BOTAN_SIMD_USE_SIMD128)
97 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8));
110#if defined(BOTAN_SIMD_USE_SSSE3)
111 const auto idx = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
112 return SIMD_2x64(_mm_shuffle_epi8(m_simd, idx));
113#elif defined(BOTAN_SIMD_USE_SIMD128)
114 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0));
175 requires(ROT > 0 && ROT < 64)
177#if defined(BOTAN_SIMD_USE_SSSE3)
178 if constexpr(ROT == 8) {
179 auto tab = _mm_setr_epi8(1, 2, 3, 4, 5, 6, 7, 0, 9, 10, 11, 12, 13, 14, 15, 8);
180 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
181 }
else if constexpr(ROT == 16) {
182 auto tab = _mm_setr_epi8(2, 3, 4, 5, 6, 7, 0, 1, 10, 11, 12, 13, 14, 15, 8, 9);
183 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
184 }
else if constexpr(ROT == 24) {
185 auto tab = _mm_setr_epi8(3, 4, 5, 6, 7, 0, 1, 2, 11, 12, 13, 14, 15, 8, 9, 10);
186 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
187 }
else if constexpr(ROT == 32) {
188 auto tab = _mm_setr_epi8(4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11);
189 return SIMD_2x64(_mm_shuffle_epi8(m_simd, tab));
191 return SIMD_2x64(_mm_or_si128(_mm_srli_epi64(m_simd,
static_cast<int>(ROT)),
192 _mm_slli_epi64(m_simd,
static_cast<int>(64 - ROT))));
194#elif defined(BOTAN_SIMD_USE_SIMD128)
195 if constexpr(ROT == 8) {
196 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 1, 2, 3, 4, 5, 6, 7, 0, 9, 10, 11, 12, 13, 14, 15, 8));
197 }
else if constexpr(ROT == 16) {
198 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 2, 3, 4, 5, 6, 7, 0, 1, 10, 11, 12, 13, 14, 15, 8, 9));
199 }
else if constexpr(ROT == 24) {
200 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 3, 4, 5, 6, 7, 0, 1, 2, 11, 12, 13, 14, 15, 8, 9, 10));
201 }
else if constexpr(ROT == 32) {
202 return SIMD_2x64(wasm_i8x16_shuffle(m_simd, m_simd, 4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11));
204 return SIMD_2x64(wasm_v128_or(wasm_u64x2_shr(m_simd, ROT), wasm_i64x2_shl(m_simd, 64 - ROT)));